2005 Presentations
Because of the large interest in the talks given at this Conference and as a service to the semiconductor community, the organizers have made the slides from many of the talks presented available on this Web site. These slides should be considered the sole property of the speaker. Please do not alter or reproduce any of the slides presented.
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The Conference organizers would like to thank each of the speakers who have made their slides available!
Plenary Session
- Welcome
Bob Helms, Dean, Erik Jonsson School of Engineering & Comp. Sci., UTD - Collaboration: The Semiconductor Industry's Path to Survival and Growth
Mike Polcari, ISMT - The Opportunities and Challenges of Bringing New Metrology Equipment to Market
Dave Perloff, ReVera, Incorporated - The R&D Crisis: It's Growing Too Fast and We Need to Act on It.
Dan Hutcheson, VLSI Research, Inc. - Metrology (Including Materials Characterization) for Nanoelectronics
Alain Diebold, ISMT
Front End Processes
- MOSFET Scaling Trends, Challenges, and Potential Solutions Through the End of the Roadmap: A 2005 Perspective
Peter Zeitzoff and Howard Huff, ISMT - Challenges of Smaller Particle Detection on Both Bulk-Silicon and SOI Wafers
Takeshi Hattori, Sony Semiconductor, Atsugi, Japan - Metrology Challenges for 45 nm Strained-Si Devices
Victor Vartanian, Freescale - Interfaces Issues in Alternative Gate Stack Structures
Eric Garfunkel, Rutgers - Atomic Layer Deposition of High k Dielectric and Metal Gate Stacks for MOS Devices
Yoshi Senzaki, ISMT - Source/Drain Junctions and Contacts for 45 nm CMOS and Beyond
Mehmet Öztürk, NCSU
Lithography
- Recent Advances in Lithography and High Level Metrology Needs for Lithography
Scott Hector, Freescale Assignee to ISMT - Mask Inspection Technology for 65 nm Technology Node and Beyond
Toru Tojo, Topcon Corporation, Tokyo, Japan - Ultra-precision CD Metrology for Sub-100 nm Pattern by AFM
Satoshi Gonda, National Institute of Advanced Industrial Science and Technology, Ibaraki, Japan - Design for Manufacture in Overlay Metrology
Mike Adel, KLA Tencor - Limits of CD Metrology
Bryan Rice, Intel - Issues in Line Edge and Line Width Roughness Metrology
John Villarrubia and Andras Vladar, NIST - Overview of Scatterometry Applications in High Volume Silicon Manufacturing
Chris Raymond, Accent Optical Technologies
Interconnect/Low-k
- The Interconnect Era of Gigascale Integration
James Meindl, Georgia Tech. - Low-k Materials for ULSI Applications
Don Frye, Dow - Aggressive Scaling of Cu-low-k Interconnects
Karen Maex, IMEC - Growth and Characterization of Ultrathin Metal Films for ULSI Interconnects
John Ekerdt, UT-Austin
Banquet
- [not yet available] Speaker: Bernard S. Meyerson, IBM Fellow, Chief Technologist & VP, STG
Silicon Materials
Electrical Characterization
- Recent Developments in Electrical Metrology for MOS Fabrication
George Brown (ISMT) and Bob Hillard (SSM) - Inelastic Electron Tunneling Spectroscopy (IETS) of High-k Dielectrics
T.P. Ma, Yale
Microscopy
- Advanced EELS Applications in Process Development
Heiko Stegmann, AMD Saxony, Dresden, Germany - High Resolution (Analytical) TEM for Nano-electronic Materials Research
Moon Kim, UT Dallas - The Aberration Corrected SEM
David Joy, ORNL/UT - Three Dimensional Characterization of Semiconductor Interfaces Using Aberration-corrected Scanning Transmission Electron Microscopy
Klaus van Benthem, ORNL
Critical Analytical Techniques
- The Role of a Physical Analysis Laboratory in a 300 mm IC Development & Manufacturing Center
Laurens Kwakman, Philips Crolles II - Recent Advances in Semiconductor X-ray Metrology
Dileep Agnihotri, Jordan Valley Semiconductors, Inc. - Profiling High-k Dielectrics with Sub-nanometric Depth Resolution
Israel Baumvol, Universidade Federal do Rio Grande do Sul, Porto Allegre, Brazil - X-ray Photoelectron Spectroscopy of High-k Dielectrics
Bob Opila, University of DE - The Relation Between Crystalline Phase, Electronic Structure and Dielectric Properties in High-k Gate Stacks
Safak Sayan, Rutgers University
Breakthrough Techniques
- Small Angle X-ray Scattering Metrology for Sidewall Angle and Cross Section of Nanometer Scale Line Gratings
Wen-li Wu, NIST - On-line Detection and Measurement of Molecular Contamination in Semiconductor Processing Solutions
Jason Wang and Michael West, Metara
CMOS Scaling
The Future