Power Device and Thermal Metrology
Research Activities
- NIST played a key role in planning and coordinating government and industry programs and activities on high voltage SiC power devices including: evaluated contractor performance for DARPA WBST HPE Phase 2; participated in planning and writing a Broad Area Announcement (BAA) for DARPA WBST HPE Phase 3 programs and presented status of SiC power devices at the Phase 3 Industry Bidder Briefing day; served as Member of DARPA/ONR SSPS Government Independent Design Panel; participated in planning ONR Mantech SiC Power Device manufacturability program; and served as panel member for DoE Program on SiC-Based Inverters in Near Zero Emission Fuel-Cell-Based Power Plants Fueled with Coal-Derived Gas.
- High voltage clamped inductive and resistive switching test bed developed. A low parasitic inductance 15 kV switching test system for clamped inductive and resistive load characterization was developed and integrated into the NIST 25 kV safety-interlocked curve-tracer system. A low parasitic capacitance temperature-controlled test fixture with 25 kV voltage isolation and 350 °C maximum controllable temperature was also included to enable HV-HF device characterization at elevated operating temperatures.
- The NIST unique high voltage curve tracer and high- HV- HF switching test system was used to demonstrate the unprecedented performance of DARPA WBST-HPE MOSFETs. 10 kV, 12 A, 50 ns inductive load switching was demonstrated for the first time. Typical high voltage silicon devices require several microseconds to switch at 6.5 kV maximum.
- NIST HV-HF SiC models were used to simu-late system performance impacts. NIST’s metrology, device modeling, and parameter extraction tools have resulted in software models for the SiC power devices produced by the DARPA WBST HPE program. These models are being used by industry and government to simulate the performance of future power distribution and conversion systems enabled by the new HV-HF SiC technology.
- NIST recently developed and tested a tran-sient thermal calibration test structure with 1 μs temporal resolution using microhotplates with integrated temperature sensors. This specially designed temperature-reference microhotplate structure is calibrated and used to verify the results of the transient IR thermal imaging system.
- As low-degradation rate SiC PiN diodes are beginning to emerge, the NIST transient thermal imaging system is being used to determine the current uniformity after various levels of stress up to 1000 hours of operation. The NIST transient thermal image system previously demonstrated that the SiC PiN current density is relatively uniform before degradation and that only 1 % of the chip is conducting all of the current after substantial degradation. Degradation of SiC diodes remains highly variable, and recent low-degradation devices show a 0 % to 30 % area reduction after 1000 hours of operation.
