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Summer Undergraduate
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, Semiconductor Electronics Division, Quantum Electrical Metrology Division, Microelectronics Programs, and Law Enforcement Standards Opportunities
Measurement Science: Fundamental Constants Multijunction Thermal Converters for Precision AC Voltage and Current Metrology CMOS and Novel Devices
Microelectromechanical Systems (MEMS)
Power Electronics Detection, Inspection, and Enforcement Technologies High Resistance Metrology (return to top) Resistance measurement in the range 1 MΩ to 1 TΩ at NIST have been made more accurate due to the development of automated bridges and a new generation of resistance standards and scaling devices. Instrument automation, bridge circuit design, knowledge of material properties, and analysis of results are skills used to improve the measurement services this project delivers to
Possible Projects Include:
For additional information, please contact Dean Jarrett: dean.jarrett@nist.gov Measurement Science: Fundamental Constants The electronic kilogram is a complex electronic and mechanical system, combining a force balance with an electric generator to measure the Planck constant h and perhaps become a new definition for the kilogram unit of mass. This system is presently producing the best results in the world for h, with 36 x 10-9 uncertainty. Some background in instrumentation programming using LabView and basic electronics would be helpful in a number of areas where a student could work on a small project. Possible projects: 1) Replace and program the electronics for a mechanical translation system that moves and positions a reference mass at micrometer precision with new PXI electronics. 2) Recode for a modern computer a current bias system to control a 14 channel Josephson voltage device. 3) Reprogram and build digital electronics for a triggering system to synchronize six instruments using a pulse generator. 4) Program and interface with several instruments, such as a GPS frequency source, a backup power supply, and a computerized control for a superconducting magnet. 5) Construct and program the power electronics for a temperature sensing and a control system for the inner volume of a large vacuum chamber. For additional information, contact Richard Steiner: richard.steiner@nist.gov Condensed matter physics research on graphene and novel low dimensional materials for new quantum and intrinsic electrical standards (return to top) The Fundamental Electrical Measurements group within the Quantum Electrical Metrology Division is pursuing the discovery of new physics base upon the emergence of novel low dimensional materials towards the development of new quantum and intrinsic electrical standards. Graphene (a single mono-layer of graphite) has recently display remarkable electrical properties, including room temperature quantum Hall effect and coulomb blockade. The undergraduate research project would involve the development of exfoliated graphene quantum Hall standards. Tasks include fabrication and precise and accurate measurements against existing quantum Hall standards to determine the feasibility of using graphene as a metrological quantum conductance standard. Measurements include graphene’s Hall conductivity and longitudinal conductivity as a function of charge carrier density, temperature, and applied magnitude field. For more information contact: David B. Newell, david.newell@nist.gov Multijunction Thermal Converters for Precision AC Voltage and Current Metrology (return to top) Ac voltage and current are most accurately measured using thermal voltage and current converters. NIST is presently engaged in research to advance the state of the art in making these devices using semiconductor fabrication technology. We have so far fabricated thermal converters for both high currents (based on silicon substrates) and high frequencies (based on quartz substrates) and shown that they are among the best standards in the world; however, the thermal, electrical, and mechanical properties of these devices are subject to improvement. The undergraduate research project would involve the detailed simulation of the thermal, electrical, and mechanical properties of multijunction thermal converters using commercial software applications such as Spice. Tasks include determining the parameters for use in the simulations, the actual simulation of the necessary properties, and a report recommending ways to improve these devices. Experience with simulation software and electrical and dimensional metrology tools desired. The possibility exists for basic clean-room work in the NIST Nanofabrication Facility. Theoretical Physics for Nanoelectronics Contact: Thomas Lipe, thomas.lipe@nist.gov(return to top) Theoretical solid-state physics research for nanoelectronic applications is in progress in order to understand the operation of advanced electronic devices and to provide more physically correct and numerically robust carrier transport models. Such transport models are used to interpret measurements and to enable predictive computer simulations of nanoelectronic devices. Topics include densities of states, band structures, high-concentration effects, carrier lifetimes, and carrier mobilities. The approach involves careful examination, extension, and experimental verification of the theoretical basis used in nanoscale device models for elemental and compound semiconductors. In particular, the SURF Student would be responsible for developing computer codes to extract transport properties from Raman spectra of GaAs, for visualizing the computer results in a user-friendly manner, and for verifying the computer results with published measurements. For additional information, please contact Herb Bennett: herbert.bennett@nist.gov Molecular Electronics (return to top) Interactions of functionalized monolayers on silicon with evaporated metal Molecular electronic structures consisting of silicon-molecule-metal structures will be made and characterized specifically focusing on the interaction of the organic monolayer with the evaporated metal. Preliminary control samples consisting of monolayers attached directly to silicon and silicon oxide surfaces and evaporated metals (Ti, Au, and Al) have been investigated. While methyl-terminated monolayers do not interact with these metals, we are interested in the interaction of various functional groups (i.e.
Specific things the student might do…
How to make silicon biorepellant Ethylene oxide monolayers on gold have shown interesting nonspecific adsorption of proteins as a function of coverage. This effect has been correlated with the conformational mobility attributed to the molecules within the monolayer. However, the thiol-gold linkage is relatively weak and leads to monolayer instability after prolonged periods of time in solution. Silicon should provide an ideal substrate for attachment of these molecules since molecules are attached through strong covalent linkages. This project will explore formation and optimization of ethylene oxide monolayers on silicon for biorepellant applications. Specific things the student might do…
Other possible summer projects:
For additional information, please contact Christina Hacker: christina.hacker@nist.gov. Hybrid Molecular Electronic/CMOS Circuits (return to top) Molecular electronics is a new field built on the idea of using organic molecules as memory/logic components in circuits. However, it is unlikely that these devices will completely replace traditional silicon-based technologies. Rather, the first step to realizing molecular electronic devices is probably through their integration with traditional CMOS structures. The overall goal is to design, fabricate, and characterize silicon-based molecular/CMOS hybrid circuits. One possibility is to use the CMOS for on-chip characterization of the molecular devices; another may be to build functional molecular-CMOS circuits. The specifics of the summer project will depend on the student's preferences and experience, as well as the current state of the on-going research. Possible Projects: 1) Hybrid circuit design and layout 2) To explore the affect of the silicon doping/orientation on the molecular electronic device behavior 3) Investigate the affect of the top contact material on the molecular electronic device behavior 4) To investigate the assembly of conjugated molecules (a type of molecules that have more device potential) on silicon. 5) To investigate the electrical behavior of some molecules that have been reported to show interesting functional electrical behaviors, such as electrical switching. For additional information, please contact Nadine Gergel-Hackett (nadinegh@nist.gov) Organic Electronics (return to top) Processing and electrical characterization of soluble organic semiconductors, insulators, and conductors Organic electronic devices are of interest for use in a broad range of large-area low-cost electronic applications, such as flexible displays, sensor arrays, smart cards, and radio-frequency identification (RFID) tags for inventory control. The electrical properties of solution processed organic materials (semiconductors, insulators, and conductors) are known to be affected by the way the materials are processed; notably the substrate interface conditioning, choice of solvent, deposition technique, and curing method. Understanding how individual processes and complex interplay between processes affect the density of electrically active structural and chemical defects is critical to advancing the field of organic electronics. The purpose of this empirical study is to correlate the electrical characteristics to the processing methods employed in forming thin films from soluble organic semiconductors, insulators, and conductors. Work to be performed:
For additional information, please contact David Gundlach: david.gundlach@nist.gov. Scanning Probe Microscopy: Kelvin Force and Scanning Capacitance Microscopy (return to top) Student will learn to operate an atomic force microscope, prepare samples, and conduct a project characterizing semiconductor device structures. A theoretical modeling aspect will be included with the project. Possible projects include development of a surface state measurement across semiconductor junctions using scanning Kelvin force microscopy and measurement of depletion widths in cross-sectioned and nanowire actively biased devices. For additional information, please contact Joseph Kopanski: joseph.kopanski@nist.gov Scanning Probe Microscopy: Programming a Digital Signal Processor and Field Programmable Gate Array (return to top) There are several potential projects that will use a DSP and FPGA to create new feedback loops and new modes of scanning probe microscopy. Emphasis of the project will include C++ programming in a Visual Studio environment to develop an integrated system. Previous experience with Visual Studio and control instrumentation is preferred. Reliability of Nanoelectronics (return to top) Electronics permeates every aspect of modern life. This will only be more so in the future. However, nanoscale electronics cannot be made precisely. The device to device variation increases with decreasing size. To make highly reliable electronics products with nanoelectronics is extremely challenging. To meet this challenge, nanoelectronic devices must be tested with new and more powerful techniques. This project develops ways to test thousands of nanoscale transistors simultaneously. We seek a student to design the electronics circuitry needed to enable the tests. The student will be designing mixed signal circuits for the project. For more information contact, Charles Cheung: kin.cheung@nist.gov High-k and Metal Gate Research by Atomic Layer Deposition (return to top) Microelectronics industry is searching for reliable alternative thin films, such as high-κ dielectrics, barrier layers, and gate metals. Atomic layer deposition (ALD) is a promising method of depositing such films for next generation devices. ALD film deposition is self-limited and based on surface reactions, which makes achieving atomic scale deposition control possible. The goal of this project is to develop processes for thin films (high-κ dielectrics, barrier layers, and gate metals) using ALD tool and to perform optical (ellipsometry, internal photoemission spectroscopy, etc.) and electrical (I-V, C-V, etc.) characterization of the films. The student will be working in a new advanced nanofabrication facility located in the NIST’s Center for Nanoscale Science and Technology. Cleanroom experience is preferred. For additional information, please contact Oleg Kirillov: oleg.kirillov@nist.gov Analog Circuit Design and Test for Small Capacitance Measurement (return to top) Student will design, simulate, construct, and test several novel capacitance measurement circuits operating at RF frequencies. Circuits displaying sensitivity to capacitance to the attoFarad range will be implemented. Several circuits will be implemented in breadboard and rapid turn around printed circuit board configurations. Time allowing, the most promising designs will be laid out as integrated circuits for fabrication as custom integrated circuits.
For more information contact: Joseph Kopanski, joseph.kopanski@nist.gov Microfluidic chip for DNA amplification (return to top) The student will help to develop protocols to combine cell lysis (breaking of cells) and PCR (DNA amplification) on polymeric devices. No prior background in biology is required and training will be provided. Precision in pipetting and strict respect of the Good Laboratory Practice will be demanded. A high degree of polyvalence will also be required. Responsibilities will include part or all of the following: literature research, manufacture of polymer devices, development and optimization of protocols to combine cell lysis and PCR, and development of interface capabilities between cell lysis chip, PCR chip and detection chip. Although support, training and help will be provided whenever required, the student will be expected to work independently, develop ideas to contribute to project goals, execute assigned tasks in a time-efficient manner, write concise reports and deliver oral presentations. For additional information, please contact
Biotechnology/Bioengineering (return to top) Cellular Interfaces Interactions using Biomaterials and Microfluidic Systems This interdisciplinary work combines aspects of cell biology, chemistry, bioengineering and nanotechnology in the development of microsystems to study cell behavior under controlled microenvironment conditions. We use polyelectrolyte multilayers to render biocompatible cell adhesion patterns to position cells on desired areas within microfluidic networks. Microfluidic devices are used as the platform where the microenvironments are built for further cellular activity monitoring. Some of the techniques that we commonly use are: tissue culture, atomic force microscopy (AFM), phase and differential interference contrast (DIC) microscopies, fluorescence microscopy, and micro and nanofabrication. For additional information, please contact Darwin Reyes: dreyes@nist.gov System-on-a-Chip (SoC) (return to top) MEMS microhotplate-based gas-sensor virtual component for SoC design.
For additional information, please contact Yaqub Afridi: afridi@nist.gov. Automating Measurements for High-Voltage, High-Frequency Silicon- Carbide Power Diodes Parameter Extraction Software Tools (return to top) The emergence of High-Voltage, High-Frequency (HV-HF) Silicon- Carbide (SiC) power devices is expected to revolutionize industrial and military power generation, transmission, and distribution systems. Progress has been made in developing 10 kV SiC PiN and Junction Barrier Schottky (JBS) power diodes. Characterization, parameter extraction, modeling, and simulation of these kinds of SiC diodes are necessary for supporting several research programs designing and developing power electronics systems such as Solid State Power Substations (SSPS) and plug-in Hybrid Electric Vehicles (HEV). NIST is playing a critically important role in enabling the development of SiC devices by providing electrical and thermal measurements, as well as developing and delivering electro-thermal models for circuit simulations to industry and other government agencies. The goal of this project is to develop an automated measurement procedure for the electrical characterization of SiC PiN and JBS power diodes, and to incorporate this procedure into the software tool used for model parameter extraction. The summer intern will use National Instrument’s LabWindows CVI software development environment to develop the procedure, together with several laboratory instruments such as high-power curve tracers, pulse generators, and digital oscilloscopes. The student should have some background in electronics devices, laboratory instrumentation, and C programming language, because CVI is a C language-based environment. The intern assigned to this project will work together with NIST researchers in the Power Device and Thermal Metrology Project at the Electrical and Electronics Engineering Laboratory (EEEL) in order to reach this goal. For more information contact: Dr Allen Hefner, allen.hefner@nist.gov Microelectronic Test Structures (return to top) Modeling of the Impedance of Integrated Circuit Interconnect Systems: Copper is displacing aluminum as the material of choice for interconnects on advanced IC (integrated circuit) chips because of its lower resistivity. The fabrication process features conductor coating with thin metallic films of materials that are five to ten times as resistive as copper. The purpose is to prevent chemical poisoning of the dielectric material in which the conductors are embedded. Our preliminary modeling of on-chip signal-propagation raises serious questions about the benefits to circuit performance at Giga-Hertz clock speeds. The SURF student would conduct further modeling and analyses to help resolve this important issue.
Co-planar wave-guide test structures for CD metrology: The issue of CD (Critical Dimension) metrology of features on masks for advanced integrated circuit fabrication is growing in importance because of factors such as increasing mask costs and feature scaling to nanometer dimensions. Based on our preliminary analyses, rf test-structures configured as co-planar wave guides appear to have many desirable properties and capabilities for this application. The student would take participate in the development of algorithms for CD-extraction from rf measurements made on coplanar wave-guide test structures and could optionally participate in making measurements.
Measurement of Sheet Resistance and Electrical CD on IC Test-Structure Chips: The available chips were designed and fabricated to serve as physical standards for the calibration of nanometer-scale metrology instruments used in advance wafer-fabrication facilities. The student will make necessary changes to available visual-basic test code to enable DC testing of available IC chips and will participate in measurement setup, execution, and analysis.
Transformation of the Surface Layers of Insulating Materials to Conducting Films by Ion-Beam Implantation: There is evidence in the literature that seed-layer formation, which is essential for the electro-deposition of copper films in IC interconnect fabrication, can be provided by ion-beam implantation of metallic species. The technique is especially beneficial for the fabrication of nanometer-level dimensional standards. The student would be tasked with making sheet resistance measurements, and their analysis, for a sequence of implantation/annealing cycles and identifying optimal conditions for specific applications. For further information, please contact: Michael Cresswell: michael.cresswell@nist.govMicroscopic Robotics (return to top) The student will work on the development of mobile robots that are so small they cannot be seen with the naked eye. Opportunities within this project include laser-based and interferrometric metrology, CAD design, system integration, software design in LabVIEW, and microfabrication. For more information contact: Richard Allen, richard.allen@nist.gov Selection of Optimum Processing for Special-Purpose Silicon Chips (return to top) A laboratory project has recently designed and implemented a screening experiment to identify which combinations of six factors in a short-loop silicon-chip fabrication sequence impact most favorably some essential properties of the finished chips. A 26-2 fractional factorial experiment design enabled an efficient study of this relatively large number of factors to provide information on the effects of their interactions. Since that time, we have identified other factors, such as the pH of a key etching solution that may enable further substantial enhancement of chip properties. The student would receive guidance from, and work in a laboratory with, several NIST experts having unique skills ranging from metrology to statistics and wafer fabrication to assist in the implementation of a new experiment with a format similar to that of the prior one. He or she would have the opportunity to operate in a new world-class clean room as well as in the laboratory.
For additional information, please contact
Weapons & Protective Systems (return to top) The Office of Law Enforcement Standards (OLES) at the National Institute of Standards and Technology (NIST) conducts a number of projects under its Weapons & Protective Systems program. These projects focus on the establishment of improved performance standards and test methodologies for various types of equipment used by law enforcement, corrections, and criminal justice agencies. OLES has worked extensively with the Home Office Scientific Development Branch in the U.K. on a standard to test stab resistant body armor, culminating in a measurement method involving a drop tower and a foam backing designed to mimic tissue response to a knife or spike threat. This method has worked well for years, although good acceptance criteria for the foam backing material and stab implements have been somewhat difficult to specify. This SURF student project would address the characterization of various materials available in the marketplace for performing these tests, and the search for methods to improve the characterization of and acceptance criteria for these materials. The student would perform testing according to the methods used in the standard to examine differences in commercially available materials, and then explore other measurement methods for the foam backing and spike blades. If successful, these new measurement methods may be incorporated into the acceptance criteria for these materials in future versions of standard to test stab resistant body armor. For further information, please contact, Amanda L. Forster: amanda.forster@nist.gov Detection, Inspection, and Enforcement Technologies (return to top) The Office of Law Enforcement Standards (OLES) at the National Institute of Standards and Technology (NIST) has three nascent projects under its Detection, Inspection, and Enforcement Technologies program that have an opportunity for summer employment. An rf-based reference short-range through-barrier mapping and imaging system is being developed on which to 1) develop the metrology for assessing the performance of these systems, 2) study imaging phenomenology, and 3) perform design trade-off studies. Through barrier (wall) imaging is somewhat of a new application for rf technology and there presently are no universal and accepted methods for characterizing their performance. The student will learn to operate the OLES system and assist in test method development, test object design and fabrication, data/image analysis, image reconstruction/enhancement, and feature extraction. A second rf-based reference system is also being developed. This system will provide long-range through-barrier tracking and surveillance capability. As with the other reference system, the metrology and recognized and accepted test and evaluation protocols have not yet been developed. The student will learn how to operate this system, perform data acquisition and analysis, and be involved in the development of test protocols for the characterization of these systems. We’re developing methods to characterize the output of electromuscular disrupters (electroshock weapons, stun guns, Tasers®). Although manufacturers have claimed these devices cause no permanent harm, this may not be the case, as has been shown by recent events. Furthermore, the reliability and accuracy of previously-reported methods used to test the output of these devices may be questionable. The student will assist in design improvements to the measurement system and test protocols, learn to use this system, and acquire and analyze data. For additional information, contact Nick Paulter: nick.paulter@nist.gov |
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